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Design Methods for DSP Systems

  1. Content type: Research Article

    The extremely dynamic and competitive nature of the wireless communication systems market demands ever shorter times to market for new products. Virtual prototyping has emerged as one of the most promising tec...

    Authors: P Belanović, B Knerr, M Holzer and M Rupp

    Citation: EURASIP Journal on Advances in Signal Processing 2006 2006:032408

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  2. Content type: Research Article

    Multiple-clock-cycle implementation (MCI) of a flexible system for time-frequency (TF) signal analysis is presented. Some very important and frequently used time-frequency distributions (TFDs) can be realized ...

    Authors: Veselin N. Ivanović, Radovan Stojanović and L Jubivša Stanković

    Citation: EURASIP Journal on Advances in Signal Processing 2006 2006:060613

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  3. Content type: Research Article

    The VLSI architecture targeted on FPGAs of a multiuser detector based on a cascade of adaptive filters for asynchronous WCDMA systems is presented. The algorithm is briefly described. This paper focuses mainly...

    Authors: Quoc-Thai Ho, Daniel Massicotte and Adel-Omar Dahmane

    Citation: EURASIP Journal on Advances in Signal Processing 2006 2006:052919

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  4. Content type: Research Article

    A new pipelined systolic array-based (PSA) architecture for matrix inversion is proposed. The pipelined systolic array (PSA) architecture is suitable for FPGA implementations as it efficiently uses available r...

    Authors: Abbas Bigdeli, Morteza Biglari-Abhari, Zoran Salcic and Yat Tin Lai

    Citation: EURASIP Journal on Advances in Signal Processing 2006 2006:089186

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  5. Content type: Research Article

    Many digital signal processing algorithms are first developed in floating point and later converted into fixed point for digital hardware implementation. During this conversion, more than 50% of the design tim...

    Authors: Kyungtae Han and Brian L. Evans

    Citation: EURASIP Journal on Advances in Signal Processing 2006 2006:092849

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  6. Content type: Research Article

    This paper presents an architecture that combines VLIW (very long instruction word) processing with the capability to introduce application-specific customized instructions and highly parallel combinational ha...

    Authors: Raymond R. Hoare, Alex K. Jones, Dara Kusic, Joshua Fazekas, John Foster, Shenchih Tung and Michael McCloud

    Citation: EURASIP Journal on Advances in Signal Processing 2006 2006:046472

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  7. Content type: Research Article

    Using the field-programmable gate array (FPGA) with embedded software-core processor and/or digital signal processor cores, we are able to construct a hardware kernel for measurement instruments, which can fit...

    Authors: Guo-Ruey Tsai and Min-Chuan Lin

    Citation: EURASIP Journal on Advances in Signal Processing 2006 2006:084340

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  8. Content type: Research Article

    This paper introduces a novel architecture for next-generation adaptive computing systems, which we term 3D-SoftChip. The 3D-SoftChip is a 3-dimensional (3D) vertically integrated adaptive computing system com...

    Authors: Chul Kim, Alex Rassau, Stefan Lachowicz, Mike Myung-Ok Lee and Kamran Eshraghian

    Citation: EURASIP Journal on Advances in Signal Processing 2006 2006:075032

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  9. Content type: Research Article

    Future generations of mobile phones, including advanced video and digital communication layers, represent a great challenge in terms of real-time embedded systems. Programmable multicomponent architectures can...

    Authors: M. Raulet, F. Urban, J.-F. Nezan, C. Moy, O. Deforges and Y. Sorel

    Citation: EURASIP Journal on Advances in Signal Processing 2006 2006:064369

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  10. Content type: Research Article

    Multimode systems have emerged as an area- and power-efficient platform for implementing multiple timewise mutually exclusive digital signal processing (DSP) applications in a single hardware space. This paper...

    Authors: Vinu Vijay Kumar and John Lach

    Citation: EURASIP Journal on Advances in Signal Processing 2006 2006:079595

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  11. Content type: Research Article

    We propose an efficient IP-block-based design environment for high-throughput VLSI systems. The flow generates SystemC register-transfer-level (RTL) architecture, starting from a Matlab functional model descri...

    Authors: Nacer-Eddine Zergainoh, Ludovic Tambour, Pascal Urard and Ahmed Amine Jerraya

    Citation: EURASIP Journal on Advances in Signal Processing 2006 2006:028636

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  12. Content type: Research Article

    Digital signal processing applications are specified with floating-point data types but they are usually implemented in embedded systems with fixed-point arithmetic to minimise cost and power consumption. Thus...

    Authors: Daniel Menard, Daniel Chillet and Olivier Sentieys

    Citation: EURASIP Journal on Advances in Signal Processing 2006 2006:096421

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