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Quantization of VLSI Digital Signal Processing Systems

  1. Content type: Research Article

    This paper describes the fixed-point model of the maximum a posteriori (MAP) decoding algorithm of turbo and low-density parity-check (LDPC) codes, the most advanced channel codes adopted by modern communicati...

    Authors: Massimo Rovini, Giuseppe Gentile and Luca Fanucci

    Citation: EURASIP Journal on Advances in Signal Processing 2011 2011:184635

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  2. Content type: Research Article

    The coefficient values and number representations of digital FIR filters have significant impacts on the complexity of their VLSI realizations and thus on the system cost and performance. So, making a good tra...

    Authors: Yu-Ting Kuo, Tay-Jyi Lin and Chih-Wei Liu

    Citation: EURASIP Journal on Advances in Signal Processing 2011 2011:357906

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  3. Content type: Research Article

    Using a specific input-restructuring sequence, a new VLSI algorithm and architecture have been derived for a high throughput memory-based systolic array VLSI implementation of a discrete cosine transform. The ...

    Authors: Doru Florin Chiper and Paul Ungureanu

    Citation: EURASIP Journal on Advances in Signal Processing 2010 2011:639043

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  4. Content type: Research Article

    Input-output or poles sensitivity is widely used to evaluate the resilience of a filter realization to coefficients quantization in an FWL implementation process. However, these measures do not exactly conside...

    Authors: Thibault Hilaire and Philippe Chevrel

    Citation: EURASIP Journal on Advances in Signal Processing 2010 2011:893760

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  5. Content type: Research Article

    A systematic approach is presented for automatically generating variable-size FFT/IFFT soft intellectual property (IP) cores for MIMO-OFDM systems. The finite-precision effect in an FFT processor is first anal...

    Authors: Pei-Yun Tsai, Chia-Wei Chen and Meng-Yuan Huang

    Citation: EURASIP Journal on Advances in Signal Processing 2010 2011:136319

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