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Rapid Prototyping of DSP Systems

  1. Content type: Research Article

    Area-efficient peak-constrained least-squares (PCLS) bit-serial finite impulse response (FIR) filter implementations can be rapidly prototyped in field programmable gate arrays (FPGA) with the methodology pres...

    Authors: Alex Carreira, Trevor W. Fox and Laurence E. Turner

    Citation: EURASIP Journal on Advances in Signal Processing 2003 2003:804527

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  2. Content type: Research Article

    This paper describes the design of a large-scale emulation engine and an application example from the field of low-power wireless devices. The primary goal of the emulator is to support design space exploratio...

    Authors: Kimmo Kuusilinna, Chen Chang, M. Josephine Ammer, Brian C. Richards and Robert W. Brodersen

    Citation: EURASIP Journal on Advances in Signal Processing 2003 2003:205943

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  3. Content type: Research Article

    The implementation of large linear control systems requires a high amount of digital signal processing. Here, we show that reconfigurable hardware allows the design of fast yet flexible control systems. After ...

    Authors: Marcus Bednara, Klaus Danne, Markus Deppe, Oliver Oberschelp, Frank Slomka and J├╝rgen Teich

    Citation: EURASIP Journal on Advances in Signal Processing 2003 2003:504157

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  4. Content type: Research Article

    We provide a methodology used for the temporal partitioning of the data-path part of an algorithm for a reconfigurable embedded system. Temporal partitioning of applications for reconfigurable computing system...

    Authors: Camel Tanougast, Yves Berviller, Serge Weber and Philippe Brunet

    Citation: EURASIP Journal on Advances in Signal Processing 2003 2003:743410

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  5. Content type: Research Article

    We introduce the Logic Foundry, a system for the rapid creation and integration of FPGA-based digital signal processing systems. Recognizing that some of the greatest challenges in creating FPGA-based systems ...

    Authors: Gary Spivey, Shuvra S. Bhattacharyya and Kazuo Nakajima

    Citation: EURASIP Journal on Advances in Signal Processing 2003 2003:720828

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  6. Content type: Research Article

    A method for the rapid design of field programmable gate array (FPGA)-based discrete cosine transform (DCT) approximations is presented that can be used to control the coding gain, mean square error (MSE), qua...

    Authors: Trevor W. Fox and Laurence E. Turner

    Citation: EURASIP Journal on Advances in Signal Processing 2003 2003:687253

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  7. Content type: Research Article

    New methodologies, engineering processes, and support environments are beginning to emerge for embedded signal processing systems. The main objectives are to enable defence industry to field state-of-the-art p...

    Authors: Bob K. Madahar, Ian D. Alston, Denis Aulagnier, Hans Schurer, Mark Thomas and Brigitte Saget

    Citation: EURASIP Journal on Advances in Signal Processing 2003 2003:349675

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  8. Content type: Research Article

    Authors: Magdy Bayoumi, Shuvra S. Bhattacharyya and Rudy Lauwereins

    Citation: EURASIP Journal on Advances in Signal Processing 2003 2003:865381

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