Reconfigurable Computing and Hardware/Software Codesign
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Citation: EURASIP Journal on Embedded Systems 2007 2008:731830
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RRES: A Novel Approach to the Partitioning Problem for a Typical Subset of System Graphs
The research field of system partitioning in modern electronic system design started to find strong advertence of scientists about fifteen years ago. Since a multitude of formulations for the partitioning problem...
Citation: EURASIP Journal on Embedded Systems 2007 2008:259686 -
Exploiting Process Locality of Reference in RTL Simulation Acceleration
With the increased size and complexity of digital designs, the time required to simulate them has also increased. Traditional simulation accelerators utilize FPGAs in a static configuration, but this paper pre...
Citation: EURASIP Journal on Embedded Systems 2007 2008:369040 -
Design Flow Instantiation for Run-Time Reconfigurable Systems: A Case Study
Reconfigurable system is a promising alternative to deliver both flexibility and performance at the same time. New reconfigurable technologies and technology-dependent tools have been developed, but a complete...
Citation: EURASIP Journal on Embedded Systems 2007 2008:856756 -
DART: A Functional-Level Reconfigurable Architecture for High Energy Efficiency
Flexibility becomes a major concern for the development of multimedia and mobile communication systems, as well as classical high-performance and low-energy consumption constraints. The use of general-purpose ...
Citation: EURASIP Journal on Embedded Systems 2007 2008:562326 -
Software-Controlled Dynamically Swappable Hardware Design in Partially Reconfigurable Systems
We propose two basic wrapper designs and an enhanced wrapper design for arbitrary digital hardware circuit designs such that they can be enhanced with the capability for dynamic swapping controlled by software...
Citation: EURASIP Journal on Embedded Systems 2007 2008:231940